Summary

• “LucidEye” improves the visibility of unclear images such as those deteriorated due to weather conditions (snow, haze, or  fog), and dark images due to backlight or insufficient illumination.
• This Hardware IP is suitable for security, surveillance applications, etc., as well as for improving image recognition rate by AI.

 

Product Number

• TM2797

Features

• Improves the visibility in various shooting conditions.
• Supports both AXI4-stream I/F and DE (data enable) I/F as input/output video interface.
• Selectable starting by software or hardware event.

Specifications

throughput	1pixe/clock, 4pixel/clock
Image size	320x240P～4096x2160P.  Must be multiple of 4 in case of 4pixel/clock
color format	8bit YUV444, 8bit YUV422
Video signal interface	・valid/ready signal handshake in AXI4-stream standard compliant ・Fixing the ready of master to high, fixed cycle delay operation by DE (data enable) is possible
Control interface	APB3

Application Examples

The figure below shows an example to integrate this IP between an image sensor and DRAM. This IP starts with a vertical sync event signal, and operates using a DE (data enable) signal. This IP operates with a fixed latency.

The figure below shows an example to integrate this IP between DRAM and a display controller. This IP starts with a vertical sync event signal, and operates using valid/ready handshake signals. If the display controller is unable to accept video data during horizontal blanking period and master ready signal goes low, this IP stops operating and stops requesting for read data to the DRAM, and resumes operating when master ready signal goes high again.

The figure below shows an example to integrate this IP between DRAM read and DRAM write. This IP starts with a vertical sync event signal or a software instruction, and operates using valid/ready handshake signals. This IP stops operation and resumes, according to DRAM response.

Document

Click here for  a brochure