Since its standardization of ISO/IEC 10918-1 in 1994, JPEG has been continued to be used as a still image storage format.
TMC has developed and commercialized a baseline JPEG hardware IP compliant to the ISO/IEC 10918-1 standard as a very compact and high-speed compression IP.
1-pixel/clock
4-pixel/clock
8-pixel/clock
Product Name
JPEG Encoder/Decoder 1-pixel/clock
Model Numbers
Encoder: TM20195
Decoder: TM20196
Features
By optimizing the encoding algorithm, TMC has achieved miniaturization and high speed.
Due to its compact design, this IP can be implemented in inexpensive FPGAs to reduce the costs. (Example: Cyclone IV series, Artix7 series)
Simple interface makes it easy to integrate and shortens the design time.
Specification
Compression Format
JPEG (ISO/IEC 10918-1)
Throughput
1 pixel/clock @ YCbCr 4:2:2
Image Size
65k x 65x pixels (max.)
Image Format
YCbCr 4:4:4/4:2:2/4:2:0/4:0:0
Bit Depth
8 bits
Interface Specification
AXI3
This IP supports both color spaces of YCbCr and YUV.
Model Names
JPEG Encoder/Decoder 4-pixel/clock
Model Numbers
Encoder: TM20135
Decoder: TM20136
Features
By optimizing the encoding algorithm, TMC has achieved miniaturization and high speed.
Compared to the 1 pixel/clock version, it achieves 4 times higher performance with about twice the circuit size.
Due to its compact design, it can be implemented in inexpensive FPGAs to reduce the costs. (Example: Cyclone IV series, Artix7 series)
Simple interface makes it easy to integrate and shortens the design time.
Specification
Compression Format
JPEG (ISO/IEC 10918-1)
Throughput
4 pixels/clock @ YCbCr 4:2:2
Image Size
65k x 65k pixels (max.)
Image Format
YCbCr 4:4:4/4:2:2/4:2:0/4:0:0
Bit Depth
8 bits
Interface Specification
AXI3
This IP supports both color spaces of YCbCr and YUV.
Product Name
JPEG Encoder 8-pixel/clock
Model Numbers
Encoder: TM20145
Features
By optimizing the encoding algorithm, TMC has achieved miniaturization and high speed.
Compared to the 4-pixel/clock version, it achieves twice the performance with about twice the circuit size. Also, compared to the 1-pixel/clock version, it achieves 8 times the performance with about 4 times the circuit size.
Due to its compact design, this IP can be implemented in inexpensive FPGAs to reduce the costs. (Example: Cyclone IV series, Artix7 series)
Simple interface makes it easy to integrate and shortens the design time.
Specification
Compression Format
JPEG (ISO/IEC 10918-1)
Throughput
8 pixels/clock @ YCbCr 4:2:2
Image Size
65k x 65x pixels (max.)
Image Format
YCbCr 4:4:4/4:2:2/4:2:0/4:0:0
Bit Depth
8 bits
Interface Specification
AXI3
This IP supports both color spaces of YCbCr and YUV.
